Circuits to be laid out :
1. An INVERTER Use: (W/L)n = 1.0/0.045 and (W/L)p = 2.0/0.045
2. A 2-input NAND gate Use: (W/L)n = 2.0/0.045 and (W/L)p = 2.0/0.045
3. A 2-input NOR gate Use: (W/L)n = 1.0/0.045 and (W/L)p = 4.0/0.045
4. A 2-input XOR gate Use: (W/L)n = 2.0/0.045 and (W/L)p = 4.0/0.045
5. A complex gate F = (A+B)•(C+D) Use: (W/L)n = 2.0/0.045 and (W/L)p = 4.0/0.045
All circuits are to be laid out using Cadence Virtuoso.
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