16 bits High Speed CMOS Multiplier IC Design

Dear sir, I am a digital design engineer expert in FPGA and ASIC design flows using Verilog and VHDL programming. Also, I am experienced with Vivado, ISE, Vivado IPs, SDK, Quartus, DC Compiler, ICC and others. I have done Wallace Tree multiplier with testbench before on Vivado and generated its bitsream file. Please check the review below: https://www.freelancer.com/projects/verilog-vhdl/bit-multiplier/reviews Wallace tree multiplier is one of the fastest multipliers in CMOS technology. Also, the Verilog code is parametrized, so it can fit 16 bits multiplier, too. In addition, I have done other large projects such as CNN hardware acceleration on FPGA in Verilog language. Please contact me to discuss more about this project. Kindest regards.

Hi there, I'm bidding on your project "16 bits High Speed CMOS Multiplier IC Design" Being a professional electrical engineer, I can do this project for you. please leave a message on my chat so we can discuss the budget and deadline of the project. Also, have a look at my profile for my reviews and portfolios. Thanks Note: This is not an automated bid and i'm ready to discuss your project right now. .. .

Hi there,I'm biddin on your project "16 bits High Speed CMOS Multiplier IC Design"Electronics, FPGA, Engineering, Verilog / VHDL and Electrical Engineering Designing 16 bits high speed CMOS Multiplier IC Using verilog from mobaxterm I have read your project description and i'm a Professional Engineer therefore i can do this project for you perfectly.I still have a few questions. please leave a message on my chat so we can discuss the budget and deadline of the project. Thanks. .. .

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