Job description<br />Job Description: Creates emulation/Field Programmable Gate Array (FPGA) models from a Register Transfer Level (RTL) design using emulation/FPGA synthesis, partitioning and routing tools. Defines and documents RTL changes required for emulation/FPGA. Develops hardware and software collaterals and integrates it with the emulation/FPGA model. Tests and debugs the emulation/FPGA model and collaterals. Defines and develops new capabilities & HW/SW tools to enable acceleration of RTL and improve emulation/FPGA model usability for pre-Silicon and post-Silicon functional validation as well as SW development/validation. Develops improvements to usability by RTL validation and debugging of failing RTL tests on the emulation platform. Interfaces with and provides guidance to pre-silicon Validation teams for optimizing pre-Si validation environments, test suites and methodologies for emulation efficiency. Develops and applies automation aids, flows and scripts in support of emulation ease-of-use and improvement of equipment utilization. <br /><br />Qualifications<br /><br />Candidate most possess a bachelors or master's degree in electrical engineering or computer science with relevant work or scholastic experience in the following areas: <br /><br />Technical <br />- Experience with Verilog, and/or VHDL coding and simulation <br />- Experience with logic design, synthesis and timing analyses <br />- Experience with FPGA design tools, flows and methodologies <br />- Experience with C/C++ programming language, Python or other scripting language <br />- Familiar with microprocessors and/or computer architecture <br />- Knowledge of pre-silicon validation <br />- Knowledge of emulation <br />- Knowledge of differences in ASIC's vs FPGA's <br /><br />Other <br />- Experience with working in a team <br />- Good written and verbal communication skills <br />- Good complex problem solving skills <br />- Self-motivated